/S06::$d400::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: SID Primer: The Working Man's Guide to SID ---------- by Stephen L. Judd (sjudd@nwu.edu) The Sound Interface Device (SID): it is one of the signature chips in the C64, but to this day a number of people still do not have a good understanding of SID -- the meaning of its registers, the idea behind how it generates sounds, etc. (I myself was in this category not so long ago). This article exists to rectify this situation once and for all with a general overview of the chip which everyone should be able to comprehend. I have also included a program for experimenting with SID, which allows the user to change the various registers and see (not to mention hear!) the effect. To use the program, just load it and run. Use the cursor keys to move between the various settings, and use the +/- keys to change those settings. To change certain settings, like frequency, by large amounts, you can press shift +/-. Large jumps will work on any setting that takes up more than one byte. Press 1, 2, or 3 to switch between the settings for voices 1, 2, and (guess!). Certain settings, such as the waveforms, are simple toggles, and the space bar is used to toggle these on and off. Finally, * will toggle the output of voice 3 on and off, although you need to press it very fast, as I only included it for the sake of completeness and did not debounce it or anything (all keys repeat). The upper left corner displays all of the (relevant) SID registers, so when you change a particular setting you will see the corresponding change in the appropriate SID registers. Since SID is located at 54272 ($D400), these values reflect the contents of SID+register number. The two registers in the lower right corner of the SID box show the current values of the voice 3 oscillator and envelope generator. If you are feeling impatient, set the sustain to 15, select the triangle waveform, use shift+ to get a reasonably large frequency, and set the gate bit, which turns the sound on. Viola! Violin! SID! SID is pretty straightforward. There are a total of three voices. There are also three filters which the output of a voice may be run through. SID is also used to read the paddles (i.e. potentiometer settings). All three voices have a number of features in common. There are four possible waveforms which may be selected: triangle, sawtooth, pulse, and noise. The waveform determines the basic "sound" of the sound. Multiple waveforms may be selected on a voice, which results in a sort of mashing together of the waveforms, although noise should never be selected at the same time as the others. The frequency of each voice runs from about 0 Hz to around 4000 Hz, with 65536 steps in-between. Higher frequencies may be generated via ring modulation. According to "Mapping the 64", the exact frequency may be calculated as : FREQUENCY = (REGISTER VALUE * CLOCK)/16777216 Hz where CLOCK=1022730 for NTSC systems and CLOCK=985250 for PAL systems. One of the more important features of a SID voice is the ADSR envelope. The ADSR Envelope is quite easy to understand. Here is how to create an envelope using a stereo: first turn the volume all the way to zero (my volume goes to 11, so it takes me a while). Now start turning it up to some level, say 5. As soon as it hits 5, start going back down again, until it hits 2. Let it sit at 2 until you get tired of sitting, and then turn it back down to zero. ADSR stands of course for Attack Decay Sustain Release. The first part, turning it up to 5, is the attack phase. Changing the attack changes how quickly the volume goes to its maximum. The second phase, turning down to 2, is the decay phase. Again, changing the decay changes the rate at which the volume decays from the maximum volume to the sustain volume, which in this case is 2. Changing the sustain value changes this sustain level. The sound will remain at this volume until the release phase is initiated. Changing the release value changes the rate at which the sound will decay to zero. To start the attack phase, simply set the gate bit. To start the release phase, clear the gate bit. The program may be used to investigate the envelope, via the voice 3 envelope generator output register: select voice 3, and set the ADSR values to, say attack 14, decay 10, sustain 10, and release 8. Set the gate bit, and the register will first increase, then decrese, then sit still, until the gate bit is cleared, at which point the sound will decay towards zero. There are two more important features for each voice: ring modulation and synchronization. Ring modulation produces nonharmonic overtones, i.e. gives it a bell-like or gong-like sound. Synchronization combines two waveforms in a special way, and tends to amplify higher frequencies contained in the waveform. These two features modulate the voice with the one "underneath" it; that is, Voice 1 is modulated by voice 3, voice 2 by voice 1, etc. Ring modulation can only be applied to the triangle waveform; that is, if ring modulation is selected for voice 1, then voice 1 must have the triangle waveform selected. Using the program, start some note playing with voice 1, and select ring modulation. Then go to voice 3 and select a waveform and a frequency -- the ADSR settings may all be 0. There are also three filters available, which may be combined. These are not separate filters for each voice, but rather one set of filters which voices may all run through. Any sound generated by SID will contain a number of frequencies. As you might expect, the filters will filter out frequencies in a special way. To use the filters, the cutoff frequency must first be selected. All frequency components above or below this cutoff frequency will be reduced in volume -- the further away these frequencies are, the more they will be attenuated. The low pass filters will let all frequencies below the cutoff through, and attenuate frequencies higher than the cutoff. The high pass filter does the opposite. The bandpass filter attenuates frequencies on both sides of the cutoff. When low and high filters are selected simultaneously, the result is called a notch filter. As an example, let's say we had a sawtooth wave playing at 100 Hz. This wave contains a number of higher harmonics, in particular harmonics at 200 Hz, 300 Hz, 400 Hz, 500 Hz, and so on. If the low pass filter were selected, and the cutoff frequency was set at 380 Hz, the 200 Hz and 300 Hz frequencies would pass right through, but the 400 Hz 500 Hz etc. frequencies would be attenuated, the 500 Hz harmonic being decreased more than the 400 Hz harmonic. Resonance is a special feature which boosts frequencies near the cutoff frequency. This creates a somewhat sharper filtering effect. The downside of the filters is that they vary quite a bit between different SID chips, so filtered sounds on one machine may sound quite different than the identical settings on another machine. The game Beach-Head even allowed the user to change the filter settings, to try to compensate for this. According to "Mapping the 64" the exact cutoff frequency is : FREQUENCY = (REGISTER VALUE * 5.8) + 30 Hz Note that the cutoff frequency is only 11 bits wide, i.e. has values from 0 to 2047. One other setting is bit 7 of location 54286 ($D418), which disconnects the output of voice 3. This lets voice 3 be used, in particular the envelope output register, without having to listen to it. The waveforms are the "shape" of the sound. Sound is how two sensors on the side of your head interperet pressure variations in the air. Speakers convert changes in voltage into pressure. The waveform generators are what control this voltage. Once again, the program may be used to get a feel for how the waveforms look, by using voice 3 and a very low frequency setting (like 1), and seeing the change in the waveform output register. The first waveform is the Triangle wave. This is SID's closest approximation to a pure sine wave. It starts at some value, increases up to its maximum value, then decreases down to its minimum value, and so on. Mathematically, this wave may be expressed as : sin(x) - sin(3x)/9 + sin(5x)/25 - sin(7x)/49 + ... so a triangle wave with fundamental frequency 100 Hz contains frequencies of 300 Hz, 500 Hz, 700 Hz, and so on. Note that the amplitude of each harmonic decreases as the square of the frequency. The second waveform is the Sawtooth. This waveform increases up to its maximum, like the Triangle, but once it gets there it suddenly drops down to its minimum, so it is like half of a triangle. This wave may be expressed as : sin(x) + sin(2x)/2 + sin(3x)/3 + sin(4x)/4 + ... As you can see it has a much higher harmonic content than the triangle wave -- more harmonics are present, and their amplitudes decrease less rapidly than the triangle wave (e.g. compare sin(3x)/3 with sin(3x)/9). Next up is the Pulse, or Square, waveform. The pulse waveform is either high or low. With SID you can set how much of the time is spent high and how much is spent low. The ratio of the time the signal is high to the time of a complete cycle is called the duty cycle. A duty cycle of 1:2 is a special case called a square wave : sin(x) + sin(3x)/3 + sin(5x)/5 + ... The neat thing about pulse waves is that as the duty cycle is changed the harmonic content varies widely -- try using the program to change the pulse width and it will be obvious. Pulse waves can have a very irregular energy distribution among the various harmonics; compare with a sawtooth, where the harmonics decrease smoothly. The final waveform is the Noise waveform. Noise is simply a randomly generated waveform; that is, random values are output through the waveform generator according to the frequency setting. Obviously the result can't be written down as a harmonic expression like the above waveforms, but the frequency spectrum as a whole may be described. White Noise contains all frequencies in equal proportion. SID generates what is known as Blue Noise: a minimum frequency is set and all frequencies above this minimum are generated with equal probability; thus SID noise is biased towards higher frequencies. A few words about ring modulation and synchronization: ring modulation is a multiplication of two signals. To see what happens, consider multiplying two sine waves together : sin(f1) * sin(f2) = sin(f1-f2+pi/2)/2 - sin(f1+f2+pi/2)/2 where a handy trig identity is used. The important thing to notice is that two new frequencies are generated, f1+f2 and f1-f2, with smaller amplitude and different phase. Try ring modulating a wave at one frequency with another whose frequency differs by 1 or 2, using the program. The result is two waves with fundamental frequencies slightly off from one another, which generates beats. In short, though, using ring modulation creates a whole slew of new sum and difference harmonics, which gives a bell-like sound. It should also be clear that frequencies higher than the maximum SID frequency setting may be generated in this way. SID doesn't work quite this way, though. That is, it does indeed generate all the sum and difference frequencies, but there is no waveform multiplication going on. See the Yannes interview, elsewhere in this issue, for more information. Synchronization synchronizes one voice to another. That is, if voice 1 is synchronized to voice 3, the voice 1 waveform will "start over" according to the frequency of voice 3. Adding a discontinuity like this has the effect of generating higher harmonics, and can change the pitch as well. Imagine a triangle waveform, counting downwards, when suddenly the waveform is reset to zero and starts counting up again. The triangle is now starting to resemble a sawtooth, which, as was pointed out earlier, contains more high frequencies with larger amplitudes. That then is a fairly complete summary of SID. For more detail on the inner workings of SID see the interview with Bob Yannes, designer of the SID chip, elsewhere in this issue. For information on programming SID, see just about any book on the Commodore 64. Otherwise, have some fun playing with SID! begin 600 wave3.run M`0@`"+49GC(P-S$@4TQ*(#DO,34O.38`J0"%_:(7G0#`RA#ZJ0^-&,"I0(7Z MJ8"-B@*-(-"I!HTAT*F3(-+_3'8)$Y(1$1$1$1$1$1$1F4%45$%#2R`Z!3`P M(""95T%6149/4DTZ#41%0T%9("`Z!3`P("`@5%))(%-!5R!054P@3D])#9E3 M55-404E..@4P,"`@F5!53%-%(%=)1%1(.@4@("`P#9E214Q%05-%.@4P,"`@ MF49215$Z!2`@("`P#1$@1T%412!224Y'#2!364Y#(%1%4U0-$9E&24Q415(Z M!2!6,2!6,B!6,PT@3$]7(%!!4U,-($)!3D0@4$%34PT@2$E'2"!005-3#1&9 M4D533TY!3D-%.@4P,`V90U543T9&.@4P,#`P$Y(%(%8Q("`@5C(@("!6,R`@ M($A)(&(3$1$1$1$1$1$%8V-C8V-C8V-3241C8V-C8V-C8VN1G6*1G6*1G6*1 MG6*1G6*1G6*1G6*1G6(`J0B%_ZE!A?Z@`+'^\`H@TO_(T/;F_]#RH!*I`YDH MV)E0V)EXV)F@V)G(V)GPV)D8V8@0Z*(`J0"%_JD$A?^@`!BE_FDHA?Z0`N;_ MBB"8#\B]`,"=`-0@CP_(BAAI!R"8#\B]!\"=!]0@CP_(BAAI#B"8#\B]#L"= M#M0@CP_(X`2P$8H8:14@F`_(O17`G174((\/X`70#*D+()@/R*T;U""/#^`& MT`RI#""8#\BM'-0@CP_HX`?0AJD$A?^E_P^@`:7+R3C0"2"%#ZD`A?WP),D[T`D@A0^I!X7]T!?)"-`'((4/J0Z% M_"%_JD%A?^@"+T&P$I*2DJ%^R"F#Z7Z MR4+0%Z`&(!@/"@H*"H7[IOV]!L`I#P7[G0;`J0B%_JD&A?^@"+T&P"D/A?L@ MI@^E^LE#T!.@!B`8#X7[IOV]!L`I\`7[G0;`J<2%_JD%A?^E_1AI!*JI$(7[ M/0#`\`*I,1AI(*``D?ZE^LE$T`6@`B!)#ZG(A?ZI!87_I?VI((7[/0#`\`*I M,1AI(*``D?ZE^LE%T`6@`B!)#ZG,A?ZI!87_J4"%^ST`P/`"J3$8:2"@`)'^ MI?K)1M`+H`*E_1AI!*H@20^IT(7^J06%_ZF`A?L]`,#P`JDQ&&D@H`"1_J7Z MR4?0!:`"($D/J>R%_JD%A?^F_;T"P(7\O0/`*0^=`\"%^Z`,(-D/I?K)2-!, MH`H@>P\@Y/^F_`<"@`\F1T`<@A0_&^M`)R1'0!2"% M#^;ZJ5B%_JD&A?^I!!AE_:JI`87[/0#`\`*I,1AI(*``D?ZE^LE*T`6@`R!) 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In the latter part of the interview he gives us a very detailed description of the SID's technology. The interview was done via e-mail in August 1996 by Andreas Varga. Some questions came from Linus Walleij. [A note from your friendly technical editor: There is a little addendum at the end of this interview, with a few comments to clarify or expand upon some of the statements in the interview. These comments are referenced in the interview by a number in square brackets, like this: [3] These comments are due in large part to a series of very helpful conversations with Andreas Boose, Marko Makela, Michael Schwendt, and Andreas Varga. Special thanks to Andreas Boose for explaining how a phase accumulating oscillator works :). -TechEd] -- > Did you foresee that people would actually treat your little > VLSI-chip like an instrument? Actually, I was an electronic music hobbyist before I started working for MOS Technology (one of Commodore's chip divisions at the time) and before I knew anything at all about VLSI chip design. One of the reasons I was hired was my knowledge of music synthesis was deemed valuable for future MOS/Commodore products. When I designed the SID chip, I was attempting to create a single-chip synthesizer voice which hopefully would find it's way into polyphonic/polytimbral synthesizers. > Are you aware of the existence of programs like SIDPLAY, > PlaySID,... which emulate the SID chip up to the smallest click ? I only recently became aware of them (through your website). I'm afraid I haven't thought much about SID in the last 15 years...I am constantly amazed and gratified at the number of people who have been positively affected by the SID chip and the Commodore 64 (which I also designed) and who continue to do productive things with them despite their "obsolescence". > Have you heard the tunes by Rob Hubbard, Martin Galway, Tim > Follin, Jeroen Tel, and all the other composers ? I'm afraid not, are recordings available in the US? > Did you believe this was possible to do with your chip? Since I haven't heard them I'm not sure what we are talking about, however, I did design the SID chip with enough resolution to produce high-quality music. I was never able to refine the Signal-to-noise ratio to the level I wanted, though. > How much of the architecture in the SID inspired you when > working with the Ensoniq synthesizers? The SID chip was my first attempt at a phase-accumulating oscillator, which is the heart of all wavetable synthesis systems. Due to time constraints, the oscillators in SID were not multiplexed, therefore they took up a lot of chip area, constraining the number of voices I could fit on a chip. All ENSONIQ sound chips use a multiplexed oscillator which allows us to produce at least 32 voices per chip. Aside from that, little else of SID is to be found in our designs, which more closely resemble the Mountain Computer sound card for the Apple II (the basis of the Alpha Syntauri system). The DOC I chip (used in the Mirage and ESQ-1) was modeled on this sound card. Our current designs, which include waveform interpolation, digital filters and digital effects are new designs that aren't really based on anything other than our imaginations. > How big impact do you think the SID had on the synthesizer > industry? Well, I don't think it had much impact on the synthesizer industry. I remember once at Commodore that Sequential Circuits was interested in buying the chip, but nothing ever came of it. My intention in designing the chip (since MOS Technology was a merchant semiconductor house at the time and sold chips to the outside world) was to be able to sell the SID chip to synthesizer manufacturers. SID chip production was completely consumed by the Commodore 64 and by the time chips were readily available, I had left Commodore and never had the opportunity to improve the fidelity of the chip. > What would you have changed in the SIDs design, if you had a > bigger budget from Commodore ? The issue wasn't budget, it was development time and chip size constraints. The design/prototype/debug/production schedule of the SID chip, VIC II chip and Commodore 64 were incredibly tight (some would say impossibly tight)--we did things faster than Commodore had ever done before and were never able to repeat after! If I had had more time, I would have developed a proper MOS op-amp which would have eliminated the signal leakage which occurred when the volume of the voice was supposed to be zero. This lead to poor signal-to-noise ratio, although it could be dealt with by stopping the oscillator. It would also have greatly improved the filter, particularly in achieving high resonance. I originally planned to have an exponential look-up table to provide a direct translation for the equal-tempered scale, but it took up too much silicon and it was easy enough to do in software anyway. > The SID is very complex for its time. Why didn't you settle > with an easier design ? I thought the sound chips on the market (including those in the Atari computers) were primitive and obviously had been designed by people who knew nothing about music. As I said previously, I was attempting to create a synthesizer chip which could be used in professional synthesizers. > Do you still own a C64 (or another SID-equipped computer) ? Sure, I have a couple of them (including the portable), but I honestly haven't turned them on in years. > Did Commodore ever plan to build an improved successor to the SID? I don't know. After I left I don't think there was anyone there who knew enough about music synthesis to do much more than improve the yield of the SID chip. I would have liked to have improved the SID chip before we had to release to production, but I doubt it would have made any difference to the success of the Commodore 64. > Can you give us a short overview of the SIDs internal architecture ? It's pretty brute-force, I didn't have time to be elegant. Each "voice" consisted of an Oscillator, a Waveform Generator, a Waveform Selector, a Waveform D/A converter, a Multiplying D/A converter for amplitude control and an Envelope Generator for modulation. The analog output of each voice could be sent through a Multimode Analog Filter or bypass the filter and a final Multiplying D/A converter provided overall manual volume control. As I recall, the Oscillator is a 24-bit phase-accumulating design of which the lower 16-bits are programmable for pitch control. [1] The output of the accumulator goes directly to a D/A converter through a waveform selector. Normally, the output of a phase-accumulating oscillator would be used as an address into memory which contained a wavetable, but SID had to be entirely self-contained and there was no room at all for a wavetable on the chip. The Sawtooth waveform was created by sending the upper 12-bits of the accumulator to the 12-bit Waveform D/A. The Triangle waveform was created by using the MSB of the accumulator to invert the remaining upper 11 accumulator bits using EXOR gates. These 11 bits were then left-shifted (throwing away the MSB) and sent to the Waveform D/A (so the resolution of the triangle waveform was half that of the sawtooth, but the amplitude and frequency were the same). The Pulse waveform was created by sending the upper 12-bits of the accumulator to a 12-bit digital comparator. The output of the comparator was either a one or a zero. This single output was then sent to all 12 bits of the Waveform D/A. The Noise waveform was created using a 23-bit pseudo-random sequence generator (i.e., a shift register with specific outputs fed back to the input through combinatorial logic). [2] The shift register was clocked by one of the intermediate bits of the accumulator to keep the frequency content of the noise waveform relatively the same as the pitched waveforms. The upper 12-bits of the shift register were sent to the Waveform D/A. Since all of the waveforms were just digital bits, the Waveform Selector consisted of multiplexers that selected which waveform bits would be sent to the Waveform D/A. The multiplexers were single transistors and did not provide a "lock-out", allowing combinations of the waveforms to be selected. The combination was actually a logical ANDing of the bits of each waveform, which produced unpredictable results, so I didn't encourage this, especially since it could lock up the pseudo-random sequence generator by filling it with zeroes. [3] [Actually, the result isn't a logical ANDing at all. -TechEd] The output of the Waveform D/A (which was an analog voltage at this point) was fed into the reference input of an 8-bit multiplying D/A, creating a DCA (digitally-controlled-amplifier). The digital control word which modulated the amplitude of the waveform came from the Envelope Generator. The Envelope Generator was simply an 8-bit up/down counter which, when triggered by the Gate bit, counted from 0 to 255 at the Attack rate, from 255 down to the programmed Sustain value at the Decay rate, remained at the Sustain value until the Gate bit was cleared then counted down from the Sustain value to 0 at the Release rate. A programmable frequency divider was used to set the various rates (unfortunately I don't remember how many bits the divider was, either 12 or 16 bits). A small look-up table translated the 16 register-programmable values to the appropriate number to load into the frequency divider. Depending on what state the Envelope Generator was in (i.e. ADS or R), the appropriate register would be selected and that number would be translated and loaded into the divider. Obviously it would have been better to have individual bit control of the divider which would have provided great resolution for each rate, however I did not have enough silicon area for a lot of register bits. Using this approach, I was able to cram a wide range of rates into 4 bits, allowing the ADSR to be defined in two bytes instead of eight. The actual numbers in the look-up table were arrived at subjectively by setting up typical patches on a Sequential Circuits Pro-1 and measuring the envelope times by ear (which is why the available rates seem strange)! In order to more closely model the exponential decay of sounds, another look-up table on the output of the Envelope Generator would sequentially divide the clock to the Envelope Generator by two at specific counts in the Decay and Release cycles. This created a piece-wise linear approximation of an exponential. I was particularly happy how well this worked considering the simplicity of the circuitry. The Attack, however, was linear, but this sounded fine. A digital comparator was used for the Sustain function. The upper four bits of the Up/Down counter were compared to the programmed Sustain value and would stop the clock to the Envelope Generator when the counter counted down to the Sustain value. This created 16 linearly spaced sustain levels without havingto go through a look-up table translation between the 4-bit register value and the 8-bit Envelope Generator output. It also meant that sustain levels were adjustable in steps of 16. Again, more register bits would have provided higher resolution. When the Gate bit was cleared, the clock would again be enabled, allowing the counter to count down to zero. Like an analog envelope generator, the SID Envelope Generator would track the Sustain level if it was changed to a lower value during the Sustain portion of the envelope, however, it would not count UP if the Sustain level were set higher. The 8-bit output of the Envelope Generator was then sent to the Multiplying D/A converter to modulate the amplitude of the selected Oscillator Waveform (to be technically accurate, actually the waveform was modulating the output of the Envelope Generator, but the result is the same). Hard Sync was accomplished by clearing the accumulator of an Oscillator based on the accumulator MSB of the previous oscillator. [4] Ring Modulation was accomplished by substituting the accumulator MSB of an oscillator in the EXOR function of the triangle waveform generator with the accumulator MSB of the previous oscillator. [5] That is why the triangle waveform must be selected to use Ring Modulation. The Filter was a classic multi-mode (state variable) VCF design. There was no way to create a variable transconductance amplifier in our NMOS process, so I simply used FETs as voltage-controlled resistors to control the cutoff frequency. An 11-bit D/A converter generates the control voltage for the FETs (it's actually a 12-bit D/A, but the LSB had no audible affect so I disconnected it!). Filter resonance was controlled by a 4-bit weighted resistor ladder. Each bit would turn on one of the weighted resistors and allow a portion of the output to feed back to the input. The state-variable design provided simultaneous low-pass, band-pass and high-pass outputs. Analog switches selected which combination of outputs were sent to the final amplifier (a notch filter was created by enabling both the high and low-pass outputs simultaneously). The filter is the worst part of SID because I could not create high-gain op-amps in NMOS, which were essential to a resonant filter. In addition, the resistance of the FETs varied considerably with processing, so different lots of SID chips had different cutoff frequency characteristics. I knew it wouldn't work very well, but it was better than nothing and I didn't have time to make it better. Analog switches were also used to either route an Oscillator output through or around the filter to the final amplifier. The final amp was a 4-bit multiplying D/A converter which allowed the volume of the output signal to be controlled. By stopping an Oscillator, it was possible to apply a DC voltage to this D/A. Audio could then be created by having the microprocessor write the Final Volume register in real-time. Game programs often used this method to synthesize speech or play "sampled" sounds. An external audio input could also be mixed in at the final amp or processed through the filter. The Modulation registers were probably never used since they could easily be simulated in software without having to give up a voice. For novice programmers they provided a way to create vibrato or filter sweeps without having to write much code (just read the value from the modulation register and write it back to the frequency register). These registers just give microprocessor access to the upper 8 bits of the instantaneous value of the waveform and envelope of Voice 3. Since you probably wouldn't want to hear the modulation source in the audio output, an analog switch was provided to turn off the audio output of Voice 3. > Any other interesting tidbits or anecdotes ? The funniest thing I remember was getting in a whole bunch of C-64 video games which had been written in Japan. The Japanese are so obsessed with technical specifications that they had written their code according to a SID spec. sheet (which I had written before SID prototypes even existed). Needless to say, the specs were not accurate. Rather than correct the obvious errors in their code, they produced games with out of tune sounds and filter settings that produced only quiet, muffled sound at the output. As far as they were concerned, it didn't matter that their code sounded all wrong, they had written their code correctly according to the spec. and that was all that mattered! -- For questions or comments, Mr. Andreas Varga may be reached through his SID Homepage on the World Wide Web at - http://stud1.tuwien.ac.at/~e9426444/ Addendum by S. Judd, Technical Editor ------+-----+----------+-----+------- References / suggested reading: "Design case history: the Commodore 64", Tekal S. Perry and Paul Wallich, IEEE Specturm, March 1985 "Programming the Commodore 64", Raeto Colin West, Compute Publications. "Mapping the Commodore 128", Otis Cowper, Compute Publications. The SID Homepage, maintained by Andreas Varga: http://stud1.tuwien.ac.at/~e9426444/ "SID Primer: The Working Man's Guide to SID" by Stephen L. Judd, disC=overy issue 2 (Yep, this issue!) "Mapping the Commodore 64", Sheldon Leemon, Compute Publications. "Commodore 64/128 Programmer's Reference Guide", CBM. The first article makes for very interesting reading and should be available at most public libraries. The second and third references have more detailed and accurate explanations of SID and the theory behind its general features, as well as actual implementation. The SID homepage has lots of technical and general information. The disC=overy article attempts to provide a general overview of the chip. The last two are included as good references for information on programming SID, especially since they are easy to acquire. The program included with the disC=overy article (wave3) is useful for investigating the SID. By selecting voice 3, and using a low freq. (e.g. a frequency setting of 1 or 2 say) the output of the waveform generator may be seen visually. Ring Modulation, Synchronization, and multiple waveform selection may all be investigated in this manner. Notes: [1] In the words of Andreas Boose: "The phase accumulating oscillator is just a 24-bit accumulator which is increased by the 16-bit value of the frequency register every phi2 cycle. And like Bob said, the upper 12 bits of this accumulator are sent to the waveform generators. Note that although he uses 12 bit, the resulting *resolution* of this signal is only 12 bit on lower frequencies, if the frequency register is smaller than 4096. On higher frequencies the resolution drops down to nearly 8-bit when the frequency register is at its max value (65535)." It should now be clear why all of SID's waveforms are linear in nature (i.e. composed of straight lines): instead of using this counter as an index into a wave table, only the counter itself is used in generating the waveforms (and counting up is an awfully linear process). On the other hand, this raises the intriguing possibility of modulating the waveform via rapid changes in the frequency register. [2] Asger Alstrup Nielsen has done a good deal of research into SID's random number generator for generating the noise waveform. I am told that the algorithm was implemented by Michael Schwendt in SIDplay and the result was not too accurate. For more information, visit the SID home page, in the references above. [3] From the IEEE article referenced above: The precise capabilities of the sound chip are not clear even today, largely because of incorrect specifications having been written when the chip was first designed. "The spec. sheet got distributed and copied and rewritten by various people until it made practically no sense anymore," said Yannes. An example of the faulty documentation is the claim that the chip can logically AND several waveforms. ... "There is no interlock to make sure that if one bit is on, the others are off," Yannes said. "That would have taken too much silicon." So if more than one waveform is selected, the internal nodes of the output multiplexer are discharged, and what emerges is the minimum of amplitudes." The meaning of that last statement is unclear, as the result is certainly not the minimum of the waveform values either. A very simple way to see what the result looks like is to use the "wave3" program in the other disC=overy article with voice 3. To test the logical ANDing hypothesis, "freeze" the voice 3 pulse waveform output at $FF by selecting pulse and a nonzero pulse width. Select a very low note frequency, 1 or 2 say. When the waveform output becomes $FF set the pulse width to zero: the pulse output is now stuck at $FF. Select another waveform, such as sawtooth, and watch (and listen to) the result! (To hear the result, make sure the sustain level is set (to 15 say) and that the gate bit is set as well). About the only thing that can be said about multiple waveforms is that they are periodic with the expected frequency. In short, nobody really knows what the result is when multiple waveforms are selected! [4] It should be clear that synchronization generates a new waveform at a fundamental frequency related to the preceding voice. Moreover, resetting the accumulator to zero will in general introduce a discontinuity into the waveform. Discontinuities will always amplify the presence of high frequencies, as can be seen by taking the Fourier transform of a discontinuous function. Compare for instance the triangle waveform, whose mode amplitudes decay as 1/k^2, and the sawtooth waveform, whose mode amplitudes decay as 1/k, where k is the wave number. High frequencies are needed to make sharp transitions. Try synchronizing a triangle waveform -- if the synchronization frequencies are very different, the result will unsurprisingly sound like a sawtooth. The higher frequencies are easy to hear; sometimes even the fundamental pitch of the note will change significantly. [5] Ring Modulation. Most books, not to mention the other SID article elsewhere in this issue of disC=overy, will explain ring modulation as a multiplication of two waveforms, which generates sum and difference frequencies. Simply put, if one signal is cos(w1*t) and another signal is cos(w2*t), then the ring modulated output is: cos(w1*t) * cos(w2*t) = 1/2 (cos((w1+w2)*t) + cos((w1-w2)*t) ) Voila! Two new waves, with frequencies which are the sum and difference of the two frequencies. Note that if the two frequencies differ only slightly, very noticable beats will result. SID works a little differently. What it does not do is to multiply any waveforms. What it does do is generate a new waveform, somewhat related to the original waveform, which contains all the sum and difference frequencies. Recall that the triangle waveform may be written essentially as: f(x) = { x, MSB=0 i.e. 0 < x <= max/2 { max-x, MSB=1 i.e. max/2 < x < max where max is the maximum value of the accumulator, 2^24. f(x) then counts upwards on one half of the cycle and downwards on the other half. Ring modulation uses the MSB of the preceeding voice to evaluate the function above. The normal triangle waveform is continuous, since when x=max/2 the two pieces of the function have the same value. If MSB is suddenly changed, however, the function, which was couting upwards, might suddenly change values significantly and start counting downwards. It is pretty simple to sketch out the result on a piece of paper. Consider the following: V3: At some frequency a little higher than V1 (waveform doesn't matter) V1: A triangle wave at some base frequency, modulated by V3. Modulated output of V1: ------------*-------*[--------------------------------- maximum value [* * [ [ * * [ * [ * [ [ * [ [ * [ [ * etc. * [ [ * [ * * [ [ [ * * * [ [ * * * [ [ * * * [ [ * *----------*[--------[*-------------------------------- minimum value ^ ^ ^ ^ [ [ [ [ [ [ [ Curve hits FF and wraps around to 00 [ [ [ [ [ V3 completes a cycle; MSB is cleared; V1 wave counts up again [ [ [ Curve hits FF and wraps around to 00; MSB is high so result [ is 255-value (i.e. counting downwards) [ V3 hits midway point in cycle; MSB is now high; V1 goes from t to 255-t, goes downwards. Well it's not really 0..255, but the meaning should be clear. :) There are now two important features: first, a number of discontinuities have been suddenly introduced, which tends to amplify higher frequencies. The second is that the frequency of the resulting waveform is quite different than that of the pure triangle. What is the frequency? To put it another way, what is the period: how long must one wait before the waveform repeats itself? In terms of SID, let both of the accumulators start at zero, and let one count up faster than the other. The period of a given voice is the amount of time it takes for its counter to return to zero. At some point both counters will return to zero, and of course the modulated wave will then repeat. This then gives the period of the modulated waveform. Let one wave have period T1 (frequency w1) and the other have period T3 (and frequency w3). When m*T1 = n*T3, for some integers m and n, the wave will repeat. That is, perhaps after ten repetitions of wave 1 and three repetitions of wave 3 the waves will both be at zero again. The resulting wave will then have frequencies w=(p*w1 + q*w3) for integer p,q. To see this, consider a wave like: f(t) = e^i 2*pi (p*w1 + q*w3) t, where w1=1/T1, w3=1/T3 let t = T = m*T1 = n*T3, then f(T) = e^i 2*pi (p*m + q*n) = f(2*pi) = f(0) Thus, such a wave has period T (although not necessarily least period T), for *any* p,q integer. This then implies that the resulting waveform contains all of the sum and difference frequencies, e.g. w1-w3, w1+w3, 2*w1+w3, etc. Q.E.D. In summary, SID's ring modulation produces a new waveform containing sum and difference frequencies of the modulating waveforms, with a strong high frequency content due to the discontinuities in the resulting modulated waveform. Note that by using ring modulation (not to mention sync) frequencies much much higher than than the upper frequency limit (~4000 Hz) of the frequency register may be generated. /S08::0100h::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: --- Z80, The basics of it --- by Raver/Phantasy ------------------------------------------------------------------------------ Introduction ------------------------------------------------------------------------------ This article is a brief overview of the Z80 CPU processor. Made by the people at the American company ZILOG. It was and still is a very popular CPU. Used in many machines, from the early Cromenco's to the later Kaypro's and C128's, in 1996 it is a prime workhorse in many microcontroller operations. The Z80 first saw action in a Commodore computer with the introduction of the CP/M cartridge for the C64. Later, CBM introduced the C128 home computer, which has a built in Z80. Both Z80 implementations are accurately regarded as half-done, limiting the processor in many ways. Focusing on the short- comings however, would be the topic of another article. Instead, I will concentrate here on the Z80 itself rather than on how it interacts with any given specific Commodore system or operating system protocol. I hope this will be of sufficient value for further exploration on your particular system configuration. ------------------------------------------------------------------------------ The Z80 Registers. ------------------------------------------------------------------------------ AF - can be only used as two 8bit registers, but push on stack and change to alternative always both. "A" is 8bit accumulator, very useful register. Most of operations can be done with "A". "F" is flag register. There are "C", "Z", "P", "V" and "S" flags. BC - 16bit register, can be used as two 8bit registers "B" and "C". It's usually used as "back counter". DE - 16bit register, can be used as two 8bit registers "D" and "E". It's usually used as "destination index", as register, who points to address of destination. HL - 16bit register, can be used as two 8bit registers "H" and "L". It's very special register, there are lots of commands available only for this register. It's sometimes called "16bit accumulator". IX - 16bit register. It can be used as two 8bit registers "XL" and "XH" too, but it's undocumented feature. That register have one very useful addressing mode, but arn't widely used, cause it's slow (14-23 cycles). IY - the same as "IX". The difference is two 8bit registers - "YL" and "YH" for this one. SP - 16bit register. "Stack pointer", points to memory location, used as start of stack. Stack can be pointed to every memory location (#0000 - #FFFF). I - 8bit register, which points to interrupt. R - 8bit register for memory regenerating. PC - 16bit register, "program counter", what points to address, where are next executing command. ! Z80 has two independent sets of registers: "AF", "BC", "DE", "HL". They can be changed by EXX registers "BC", "DE", "HL" to "BC'", "DE'", "HL'" and by EX AF, AF' register "AF" to "AF'". Values of other register set will be saved. Processor don't know, with which one of two sets it works now. ------------------------------------------------------------------------------- Commands: What moves numbers in registers and memory? ------------------------------------------------------------------------------- LD A,#04 - moves 4 into register "A" LD HL,#4000 - moves 16384 into register "HL" LD (#C000),A - moves value of register "A" into memory location 49152 LD (HL),B - moves value of register "B" into memory location pointed by "HL" LD A,(HL) - moves value, which is held in memory location pointed by "HL", into register "A" LD (IY+#03),A - moves value of register "A" into memory location, pointed by register "IY" +3. This addressing mode is only for "IX" and "IY". ------------------------------------------------------------------------------- Commands: What moves blocks of bytes? ------------------------------------------------------------------------------- LDIR - very cool command, moves block of bytes pointed by "HL" to memory location pointed by "DE". The lenght of block is in "BC". Example: LD HL,SOURCE LD DE,DESTINATION LD BC,LENGHT LDIR It's fully automatic, but you can do it manualy by replacing LDIR with a lots of LDI - it's much faster! There is another block command LDDR, the difference is: LDIR moves blocks from start to end, LDDR moves them from end to start. Also, there are commands for searching block of bytes in memory and commands to put in port block of bytes and take from port block of bytes. ------------------------------------------------------------------------------- The Stack. ------------------------------------------------------------------------------- Stack is very useful on Z80. It's pointed by register "SP" and can be located anywhere you want, because "SP" is a 16bit reg! (Note : In the 65xx series CPU, the SP (Stack Pointer) is merely an 8bit offset of page 1 ($01xx). This is why the 65xx stack is limited to page 1). Stack is used for commands like CALL, it pushes on stack return address, which is later used by an RET. The stack can be used as a very fast block-byte mover and buffer refresher, for example. Commands for stack using are PUSH and POP. PUSH puts 16bit value of registers on stack and POP pops 16bit value from stack. Remember, the stack can be of any 16bit (0-65535) size and placed anywhere. ------------------------------------------------------------------------------- Interrupts. ------------------------------------------------------------------------------- Z80 has two interrupt modes - NMI and INT. NMI is a non-maskable interrupt and INT is maskable. NMI defines the main hardware interrupts and generally, they can not be used by coder. Fortunately, INT can be used by coder and register I holds value of interrupt vector. There is IM0, IM1 and IM2 mode of INT. Rather use have IM2 mode. Command to return from intrrupt routine on Z80 is RETI. ------------------------------------------------------------------------------- Port control. ------------------------------------------------------------------------------- The commands to control port are: OUT and IN. OUT writes value to port, but IN reads value from it. All controling of music processors, disk controller and RAM pages swithching is done by OUT. But some, for example to check, if key is pressed, you must use command IN. There can be following combinations of IN: LD A,high value of port address IN A,(low value of port address) or LD BC,full 16bit port address IN A,(C) and for OUT: LD A,value to send to port LD C,high value of port address OUT (low value of port address),A or LD A,value to send to port LD BC,full 16bit port adress OUT (C),A There is more to the Z80 of course (Flags, etc.), but this should get you started. Worthy texts on Z80 ML include works by Rodnay Zaks or Kathe Spracklen (co-author of Sargon chess). These and a bit of hard gumption will yield great rewards with Z80, as with any human endeavour persued at length. :) Raver -- For questions or comments on this article, Raver may be reached at the following internet address : raver@10mb.com :::::::::::d:i:s:C=:o:v:e:r:y:::::::::::::::::i:s:s:u:e::2:::::::::::::::::::: \H01::::::::::::::::::::::::::H:A:R:D:W:A:R:E::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: Charger up! The VIC-20 to ATARI 2600 'Ram Cartridge' Programmer -----+-------+----------+----------+-------+----- by Ravid Noam (nravid@newton.bgu.ac.il) A while back, I was searching the internet and found several hundred ROM images for the Atari 2600 video computer system. I also found a couple of ways to transfer the images to the 2600, but none used a Commodore computer as a host. Seeing that my own VIC-20 was equipped with sufficient hardware to become a host, I set about the task of devising a VIC-20 --> Atari 2600 programming interface. This article includes the instructions on how to build it. Be warned that most of the wiring is in schematics (.gif format- -two of the .uue's at the end of this article) so you do need to have the ability to read and carry out a schematic. In this text, I will attempt to outline some of the more salient points required to build the interface and thereby ease the process. As with all hardware projects, you undertake this at your own risk. Neither myself nor the staff of disC=overy is responsible for any use or misuse of the information presented in this article. -- What you need to own: - Atari 2600 video game. - Commodore Vic20 plus ram expansion of 8k or more. If you don't have 8k expansion, read the notes about the basic program included in this document. - Commodore 1540/1541/1571 disk drive, or other model compatible with the Vic20. A tape drive can be used instead, but you have to change the device numb. from 8 to 1 in the basic program running on the Vic. The "8" appears three times in the program. What you have to build: RAM CARTRIDGE ------------- It's like a regular 2600 cartridge, but with the rom chip replaced by a 32k cmos ram chip, plus backup battery and some additional parts. The ram cart is plugged directly to the atari like a real cartridge. To load games to the ram, the cart has to be plugged to the main circuit. The ram cart can hold up to 16 games of 2k or 8 games of 4k length. Components description: - U1 : ...62..256... - the name isn't important. Has to be a 32k by 8bit static ram memory device, with access time lower than 200 nano-seconds and low-power data retention ability, i.e. ability to remember the data when the operating voltage is falling to 1.5V or lower. Most CMOS chips have these capabilities. It has to come in the standard 28 pin dual-in-line package. 32k static ram pinout diagram: ________ A14 -|1 28|- Vcc Vcc - operating voltage +5V, A12 -|2 27|- R/W or 1.5V in sdandby mode. A7 -|3 26|- A13 _ A6 -|4 25|- A8 R/W - read/write select A5 -|5 24|- A9 0 - write , 1- read A4 -|6 23|- A11 __ A3 -|7 22|- OE OE - Output Enable, active low A2 -|8 21|- A10 __ A1 -|9 20|- CS CS - Chip Select, active low A0 -|10 19|- D7 D0 -|11 18|- D6 A0..A14 - adrress lines D1 -|12 17|- D5 D2 -|13 16|- D4 D0..D7 - data lines ground -|14 15|- D3 -------- ground - common ground - U2 : CMOS 4011 - quad two-input nand gate, 14 pin IC. In this circuit and in the main circuit, it can be replaced by a CMOS hex inverter or by NPN transistor + 2 resistors -- implementation for each inverter. I used 4011 because I have many of this kind. - Q1 : 2N2222. Can be replaced by any silicon NPN small signal transistor with these ratings : Vce(max) > 10V , Ic(max) > 30mA , Hfe(min) > 100 . - D1 : 1N4001. Can be replaced by any similar rectifier diode. - D2 : 1N4148 , or similar. - C1 : 100 micro-farad , 10V, electrolithic capacitor. - R1 : 22 kilo-ohm resistor . - R2 : 10 kilo-ohm resistor . - R3 : 500 kilo-ohm resistor . - R4 : 50 kilo-ohm resistor . All resistors are small power resistors. 0.125 Watt type should be big enough. - BAT1 : 3.6V Nickel-Cadmium rechargable battery. The same as the CMOS-RAM backup battery inside the IBM-PCs. It can be soldered into a printed circuit. - S1...S5 : two-position switch. - PCB edge connector : The ram cartridge has to be plugged to the Atari like a regular cartridge, so it must end with double-side printed circuit edge connector, with 24 contacts, 12 on each side, and with the same size as of a regular cartridge edge connector. The Connector can be an old atari cartridge as the PCB connector. Just remove the rom chip and connect the old cart to the rest of the ram cartridge circuit by wires. Using one or two flat-cables instead of 24 seperate wires will give a nicer look. Another option is that the connector and the rest of the cartridge can be on the same printed circuit. I know There are EPROM cartridges made for the Atari2600, where instead of the rom they have socket for eprom chip, plus the 4011 chip. The whole ram-cartridge can be built on this platform, saving a lot of wiring work. - >> Important notes << - 1. When using one of these options, remember to disconnect the ground (contact 13) from the signal ground (contact 12), as the latter one is the read/write control. 2. It is strongly advised that the ram cart is made in a way obtaining only one possible way to plug in the cartridge, Otherwise, every time you plug it to the atary or to the main circuit, you have to be carefull not to plug it the wrong way, i.e. upside down - this can cause permanent damage. Edge-connector diagram : (looking at the edge connectors of an atari cartridge, when the cartridge's big label is up) D3 D4 D5 D6 D7 A11 A10 A12 A9 A8 +5V SGND up side 1 2 3 4 5 6 7 8 9 10 11 12 ----------------------------------------------------------- printed circuit 13 14 15 16 17 18 19 20 21 22 23 24 GND D2 D1 D0 A0 A1 A2 A3 A4 A5 A6 A7 down side Functional description: (you don't have to read this if the schematic is clear to you) - CS inverter: the nand gate in the lower-right corner - invert the active-high chip select signal from the atari to the standard low-active signal used on memory chips. - chip select protection: R3,R4,Q1 - lock the ram when the power is down, ie. when Atari is off. R1 and the CS inverter also contribute to this task. - R/W inverter: the upper nand gate. Like with the chip select, converts active-high to active-low. - back-up section : the battery BAT1 feeds the ram and the 4011 when the external 5V is down. R2 recharges the battery when power is up, and pass on the stand-by current from the battery when power is down. D2 and C1 improves the power supply in transition times. - s3,s4 and s5 : select one of the eight 4k blocks avilable. - s1: 4k-mode / 2k-mode selection. - s2: in 2k-mode - select which one of the 2k-blocks is used. Notes: Build the cart in a way you can hold it in your hands without touching the metal parts. Shorting something with your fingers can lead to data lost. If the circuit seems too complicated, there are some ways to simplify it: - The rechargable battery. Can be replaced by a cheaper non-rechargable battery, and the resistor R2 has to be removed, to prevent charging. Remember that the 4011 chip must receive minimum 3V operating voltage, and plus the voltage drop over D2, we get minimum voltage of 3.6 that the battery must supply. Battery that consists of three 1.5V (=4.5) cells is applicable, but isn't a common thing. In theory, a 3.0V or even 1.5V battery can be used, since most of the cmos ram chips can retain their data under 1.5, 1.0 or even 0.7V stand-by operating voltage. If the problem is with the 4011, it can be replaced. Each one of the two gates used in this circuit can be replaced by a NPN transistor and two resistors, and this combination should function under 1.0V or even 0.8V . - The chip select protection circuit: Q1, R3 and R4. Before the 3.6V battery, there was 2.4V battery. After some months, the cartridge became forgetful. Then I added these parts, but the problem didn't get solved. Only when the battery was replaced by the 3.6V one, the ram cart returned to function properly. It's probably the 4011 which decided to demand the 3.0V. Now, R3,R4 and Q1 seem useless, but I have decided not to remove them, because the data retention issue is too sensitive from being economized. If you want to check this, remove them and see if the ram cart still function. The CS pin of the ram has then to be connected directly to the output of the nand gate. - s3,s4 and s5 : If you use standard pin-compatible 8k ram chip instead of the 32k ram, you don't need s3 and s4. But then the cartridge can hold only two 4k atari games or four 2k games. s5 can be replaced by shorting A12 of the ram to ground or to +5V, but then the amount of data that can be stored on the chip is divided by two. - s1,s2 : After selecting the 4k bank by s3..s5, s1 is used to select between two options: one 4k game or two 2k games. In 2k mode, s2 selects between the two 2k banks. s1 and s2 can be omitted if you load the 2k games as 4k games- you load a 4k file which it's last 2k half is a copy of the first 2k half. In this case, the A11 pin of the ram should be connected directly to the A11 incoming signal from the atari. THE MAIN CIRCUIT ---------------- The task of the main circuit is to load games into the ram cartridge. Also, it can read to save the content of a real cartridge. The circuit is connected to the Vic20's user port. [Ed. Note : Assuming the VIC-20's user port is similar to the C64's user port, then my guess is that this portion of the project could be adapted to the C-64 with some minor hardware and software revisions. Any takers? ] Components description: - U1,U2,U3 : CMOS 4094 - shift register, 16 pin IC. - U4 : TTL 74LS165/74HCT165/74LSHCT165 - shift register, 16 pin IC. - U5 : CMOS 4011 - quad two-input nand gate, 14 pin IC. - Q2,Q4 : 2N2222. Can be replaced by any silicon NPN small signal transistor with these ratings : Vce(max) > 10V , Ic(max) > 30mA , Hfe(min) > 100 . - Q1 : 2N2907. Can be replaced by any silicon PNP small signal transistor with the ratings of Q2 and Q4. - Q3 : 2N2905. Can be replaced by any silicon PNP transistor, with these ratings : Vce(max) > 10V , Ic(max) > 300mA , Hfe(min) > 50 , metal package (TO-3,TO-5 etc). - LED : any common small (2mm size) visible LED. The LED and its resistor R9 are optional. - R1,R2,R3,R6,R8 : 22 kilo-ohm resistor . - R4,R7 : 1 kilo-ohm resistor. - R5 : 220 kilo-ohm resistor. - R9 : 5 kilo-ohm resistor. All resistors are small power resistors. 0.125 Watt type should be big enough. - Vic20 User Port interface : The user port in the Vic20 is a double-side printed circuit edge connector, with 24 contacts, 12 on each side. The interface is a female connector in the same size which can be plagged on it, and contacted to the main board by 8 wires. Be careful not to plug the interface to the Vic20 the wrong way, i.e. replacing the top side with the bottom side. Such a mistake can damage the VIA-6522 on your Vic20 or some parts in the external circuit. Write "top" on the top side of the female connector or, if you have time, you can shape two little plastic parts and insert them in the female connector, against the two a-symetric slots in the user-port edge connector. This will prevent you from doing such a dangerous mistake. - Atari2600 cartridge interface : exactly like the one in the Atari - a female PCB connector with 24 contacts, 12 on each side. like in the case of the VIC's user port, it is recomended to ensure that there is only one way to plug in the ram cartridge or the regular atari2600 cartridge. The easiest way to obtain this interface is to take it out of old Atari video game cart. Then the interface can include its plastic housing which eliminates the possibility to insert a cartridge the wrong way. You can use the entire case of the atari cart. to hold the main circuit inside. Functional description: (you don't have to read this if the schematic is clear to you) - U1, U2 and U3 : three 8 bit serial to parallel shift registers, which spreads the serial signals from CB1 and CB2 to 20 bits word - 8 bit data out + 12 bit adrress. - U4 : converts the parallel data byte read from the cartridge to serial data sent to CB2 under control of CB1. - chip-select inverter - the lower nand gate inverts active-low chip select signal from PB0 to active-high one needed for the Atari cart. Although PB0 is software programmable and can produce active-low signal, the default position of it (i.e. after turning on the Vic20 or hitting RUN/STOP+RESTORE) is high. Also this gate isolates the vic from the plugged card - you can never know what you plug in, so this method of operation is prefered. - Q4, R5 and R6 : Q4 and R5 enables U4 to send data to the serial line CB2 when PB7 is in read mode. Otherwise CB2 is used to send data to the 4094s. R6 is pull-up resistor for data coming from U4. - read/write inverter: the upper nand gate - similar to the chip select inverter (default position,isolation). - R7, R8: this voltage divider protects the nand gate from overload when PB7 is in write mode and a real cart is plugged. R8 is also pull-down resistor for the read/write in the ram cart. - power control: Q1, Q2, Q3, R1, R2, R3 and R4 amplifies the 0.2mA control current from PB5 to the current consumed by the main circuit and the cartridge. Notes: - The LED isn't necessary, but it helps you know when the main circuit is turned off - when it's on, you are not allowed to plug in or out the cartridge. - The ground sign on the schematic doesn't mean physical grounding. It means that everything ended with it is connected with each other. It can be really grounded, but that depends on your Vic20's power supply. - The 4011 can be replaced. See the notes about the 4011 in the ram cartridge section of this document. - The power control can, theoriticaly, be reduced to R1,R2 and Q3 only. The base of Q3 is then connected to the hook up of R1 and R2, instead of the base of Q1. But the current amplification of Q3 has to be high. We don't want to overload PB5 and, Q3 has to be in its saturation area in order to output more than 4.8V, under load currents of 50mA, 100mA and more. If we don't chage R1, then I(PB5) = 0.2mA. The user port of the Vic20 is permitted to supply up to 100mA. Thus Hfe(min)= 100/0.2 = 500. Too high. The nominal active current of the main board and the ram cart is less than 50mA. Now we get Hfe(min)= 250. Still can't be obtained from every 2N2905-type transistor, according to the manofacturer data. But you can try it, it will probably work. A darlington transistor isn't suitable because it will give 4.3V output, not enough for U4 and the memory chip on the cart. One transistor can be saved if PB5 turns into active-high instead of active-low. But then the circuit is automaticaly turned on when the VIA6522 in the Vic is being reseted. The software part: The program which controls the ram-cart loading and the cartridge saving is a 3.5k Basic program, running on the Vic20. It uses 0.5k machine language program. The program files are: - ATARI14/C the basic program. - ATARI MCP the machine code program. [Ed. Note : The uuencoded versions of these files will extract with these filenames. If this is a problem for your host machine, please edit the filename field in the uuencoded versions at the end of this article. Please keep in mind that you should rename them (as seen above) on your VIC-20's drive. Such action will prevent potential load-chaining problems.] The basic program is written for using a disk drive. If you have only tape, change the "8" device number in the basic program to 1. It appears three times: When loading games, when saving cartridge content and when loading the machine code program. Every time the program is runned, a checksum is made over the m.code program in memory, and only if the checksum fails, the m.code program is reloaded. Something i forgot - after reloading, the m.c. program isn't being checked- so it's downloading from the PC has to be done carefully. To check it, load first the machine code program with ",8,1" or ",1,1", type "NEW", and only then load and run the basic program. If the m.c. program isn't reloaded, then you know it had been downloaded properly. If the ram expansion on the vic is non volatile, the mc. program will remain in memory when the Vic is off. In the case of 16k+ ram expansion, the basic start can be raised to $4000 and then the basic program becomes non volatile too. In this case you have to change the memory settings in the program's first lines. The current memory configuration: $1000 4096 - $11FF 4095 : screen bytes $1200 4608 - $2DFF 11775 : basic program + variables $2E00 11776 - $2FFF 12287 : machine language code $3000 12288 - $3FFF 16383 : 4k game buffer It's possible to cancel the 4k buffer by transferring data between the disk and the cartridge byte by byte, and thus to compress the entire thing to an unexpanded Vic20. But It's not simple and limits the program's ability to grow up. Operating instructions: SAVING-CARTRIDGE CONTENT ------------------------ 1. The main circuit has to be plugged to the Vic20's user port, before the Vic is turned on. 2. Run the basic program, if it is not already running. 3. Plug in the Atari2600 game cartridge. 4. From the main menu, select "copy 2k" / "copy 4k" with or without check. Before selecting, check that the cartridge is plugged in. DON'T plug it in or out when the vic is reading it. It is avdised to connect a LED (+ its resistor) to the main circuit, to see when it is powered on. Only when the power is off, the cartridge can be inserted or removed. 5. If you selected copy with check, the saved file will be reloaded & compared with the cartridge content. 6. The cartridge content is now saved in a file. The format of the file is 2 bytes - low and high byte of the start adrress of the buffer, followed by the content itself - 2048 or 4096 bytes. 7. Now you will be asked for continue. If yes, the procedure repeats itself in the same copy-type selection. Notes: - 2k games can be saved as 4k games, by choosing "copy 4k" on the menu. The 4k file following the start adrress will be a double image of a 2k game. - The saving proccess can be done with no cart plugged in without damaging anything. The saved file will be full of 255's ($FF). - You can hit RUN/STOP + RESTORE anytime and the main circuit will be turned off. LOADING GAMES TO THE RAM CARTRIDGE ---------------------------------- 1. The main circuit has to be plugged to the Vic20's user port, before the Vic is turned on. 2. Run the basic program, if it's not already running. 3. Insert the ram cartridge, if it isn't already plugged in. DON'T plug it in or out when the vic is writing to reading it. It is avdised to connect a LED (+ its resistor) to the main circuit, to see when it is powered on. Only when the power is off, the cartridge can be inserted or removed. 4. Select the desired switch combination on the ram-cart. Check that it is not the combination of an already loaded game, which you don't want to be overwritten. If loading 4k game,move s1 to 4k mode. For a 2k game, move s1 to 2k mode and select (with s2) one of the 2k banks. s3, s4 and s5 selects between 4k banks, and gives 8 combinations. 5. From the main menu, select "load game". Type the name of the game and it will be loaded. No disk browser at this stage. Notes: - When loading 2k games which have been saved as 4k games, move s1 to 4k mode. - The loading proccess can be done with no cart plugged in without damaging anything. - You can hit RUN/STOP + RESTORE anytime and the main circuit will be turned off. begin 644 atari14/c M 1(<$@$ CR!3059%(D P.D%405)),30O0R(L. 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MXFY.;F7%@[#05N$7]%B?V .#-1C/]:0__GU_D2V;$RX%!BD?UG? M0G'UC/DEP#!&U;]<#_I\WUES\*%"Q UH,E^**7N(B7 GMY5Y&ONR[_6BC%>' M0-!^2*[#\O#O:KA/)4+07ZK#W_5;%C)\_TIY(;9G" WQ>_\6X:&ZJ-A"-3O] M;7_+@PO&(-C-H$'D .IV_F'QXT_^1\_MR/"YD/OC\B_2!C+C[Q"["T.S"&"Z MW/XPRDFKO3CKS;O_8"B.9$D)"F&2 >"^<"S/=&V[!0ZL?.__P*!P2"P:CSY4 M1FE@]I1.I'1*K5JOV.P%I;HZ!=$L:JPMF\_HM#I-5H2/3#![3:_;[_C\TAQG MR]]Z@8*#A(6&AXB)BHN,C8Z/D)&2DY25EI>8F9J;G)V>GZ"AHJ.DI::GJ*FJ MJZRMKJ^PL;*SM+6VM[BYNKN\O;Z_P,'"P\3%QL?(RKK[.WN[_#Q\O/T]?;W^/GZ^_S]_O\ PH< M2+"@P8,($RINW;MX\^K= MR[>OW[^ PL>3+BPX<.($RM>S+BQX\>0(TN>3+FRYS+FSY\^@0XL> M3;JTZ=.H4ZM>S;JUZ]>P8\N>3;NV[=NX<^O>S;NW[]_ @PL?3KRX\>/NR),K M7\Z\N?/GT*-+GTZ]NO7KV+-KW\Z]N_?OX,.+'T^^O/GSZ-.K7\^^O?OW\./+ MGT^_OOW[^//KW\^_O___ 8HX( $%FC@@0@FJ.""##;HX(,01BCAA!16:.&% M&&:HX88<=NCAAR"&*.*())9HXHDHIJCBBBRVZ.*+,,8HXXPTUFCCC3CFJ... M//;HXX] !BGDD$06:>212":IY)),-NGDDU!&*>645%9IY9589JGEEEQVZ>67 M8(8IYIADEFGFF6BFJ>::;+;IYIMPQBGGG'36:>>=>.:IYYY\]NGGGX &*NB@ MA!9JZ*&()DI7 @ [ M 1 end \H02:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: The 8 bit Modplay 128 Board, a three-diode addition by Nate Dannenberg Hello all, Nate Dannenberg here again, with an update to my original schematic and assembly instructions for the 8-bit DAC Circuit described in disC=overy issue #1. This change will require three 1N914 diodes, and some solder. What we will be doing here is rigging the DAC Circuit to trigger all four tracks simultaneously at the moment track 1 has been updated and clocked. The point of this is that, when used with my MODplayer software, all four tracks will output their samples at the same time, thus eliminating the switching and mixing noise that the circuit was producing before. Those who used this device for only 1 track output will probably not hear any improvement, but multitrack players will hear a significant reduction in the "ringing" sound that accompanies low sample rates. 1) Remove the jumper or wire that connect pins 7 and 8 of the MAX505 together, and move any ground from pin 8 over to pin 7 of the MAX505. We want to take pin 8 completely out of the circuit. 2) Connect all three diode's ANODE leads to pin 8. The Anode is the "arrow" in the diode symbol, the end of the diode opposite the line on the diode's case. 3) Connect one each of the diodes' Cathode leads to pins 17, 18 and 19 of the MAX505, or to the corresponding pins on the User Port plug. That's it! Have fun and enjoy the wonders of 8 bit four track digital sound! -- For questions or general commentary on this article, Mr. Dannenberg may be reached at the following addresses : Internet : Bowes1@cris.com or Bowes2@cris.com Snail Mail : Digital Audio Concepts, Ltd c/o Nate Dannenberg 9804 Northcliff Drive Dallas, TX 75218 Phone : (214) 319-9879 data, or (214) 320-1386 voice \H03:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: The Virtual PLUS/4 : Upgrading your C16 to 64 Kilobytes! by Martin Gierich How many times have you heard from PLUS/4 fans, "Your C16 is only good as a PLUS/4 parts depot" ? How many times have you been offerred money for your C16 by these same TED-chip-seeking adepts? Disregard temptation because now your C16 can be turned into the pseudo-equivalent of a PLUS/4 with the ability to run a great deal of PLUS/4 software. You see, the C16 and PLUS/4 belong to the "264" series of Commodore machines. The C16 is actually a PLUS/4 with a few chips missing, notably the 6551 UART (and userport) and a full 64 KB of memory. In this article, we will be upgrading a C16 to a full 64 KB, allowing us to run many PLUS/4 or "generic 264" software (minus userport-terminal programs and some assorted misc. software). :::Important::: Before starting read this carefully and check out the schematics in your C16 manual. You should be familiar with soldering. I have reconstructed this, it is about 10 years since I have done this. I can give you no warranty, do it on your own risk ! Neither myself nor the staff of the disC=overy journal is responsible for any use or misuse of information presented in this article. 1. Buy two 64x4 bit dynamic RAM chips like "TMS 4464" or "41464". They should cost less than US$10 together. 2. Remove your two old "TMS 4416" RAM chips from your C16. They are labelled U5 and U6. You might destroy them, but be careful to not destroy something else ! I have used scissors to cut the pins and then I have desoldered the pins. 3. Now solder two 18 pin sockets in where the old RAM chips have been. Again do it carefully to avoid destruction ! Check out where pin 1 is. Then plug in the new RAM chips. 4. Check everything again, then switch on your C16. It should still show "12KB free". 5. Adress lines A0 to A13 are connected to the multiplexers U7 and U8. You need to connect A14 and A15 to them instead of +5V at U7 pin 2 and U8 pin 14 (but the +5V connections at pin 16 must be left). For example get them from the CPU (U2) pin 21 and 22. First scratch the +5V connections. U8 pin 14 is connceted on the lower side only and should be easy to disconnect. U7 pin 2 is more tricky. Disconnect the line between pin 2 and pin 16 at pin 16 on the upper side (U7). Pin 16 still gets +5V from the lower side. Now you have two choices: 6a. To always have 64KB: Connect U7 pin 2 with U2 pin 21 (A14). Connect U8 pin 14 with U2 pin 22 (A15). 6b. To choose between 16KB and 64KB: You need a double switch (or whatever this is called, it has 6 pins). Connect U7 pin 2 and U8 pin 14 to the two middle pins of the switch. Connect U2 pin 21 and 22 to the two upper pins of the switch. Connect +5V or Ground to the two lower pins of the switch. With that you can chosse where your 16KB area is located in your 64KB area. I have used FB13 to get Ground and FB14 to get +5V. Keep the connections short ! 7. Check everything again carefully. Then switch on your C16. It should show "60KB free" if the switch is in right position. 8. It is a good idea to replace the 7805 (labelled VR1) with a 78S05, because the 78S05 switches itself off, if it gets too hot. Simple, eh? Enjoy ! -- For questions or general commentary on this article, Mr. Martin Gierich may be reached at the following internet address : uj3w@rz.uni-karlsruhe.de \H04:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: Continued Lt. Kernal Hard Drive Support by Ron Fick (rfick@nyx.net or Caped Crusader @ Batcave on CommNet) Probably my best enjoyment from this great Commodore 8 bit hobby is helping fellow Commodore enthusiasts with my expertise on electronic hardware. I have been an electronics design engineer for 20 some years and I have an in all types of computers, but the Commodore has always been my favorite for hardware/software work ever since I bought my first C64. One peripheral lacking on Commodore 64's and 128's was a means of mass data storage. Disk drives are slow and unreliable, especially for applications where constant 24 hour use is required. Commodore did make some hard drives for the Pet series but none were produced by Commodore for the newer 64's and 128's. It was time for some aftermarket designers to fill the void. Several designs came to market, but the one that has stayed popular the longest is the Lt. Kernal hard drive system. A couple of fellows named Roy Southwick and Lloyd Sponenburg came up with the initial design of the Lt. Kernal. The story has it that Roy bought his son his first C64 and datasette and quickly found that system drudgingly slow for loading and saving programs. Even when he upgraded the system to use a 1541 disk drive, Roy was frustrated. You all know how you can take a coffee break while some programs load off a 41, which didn't impress Roy since he and Lloyd were software/hardware engineers on mini-computers at the time. The Lt. Kernal hard drive system for the C64 was introduced in December of 1984 and it's main customers were businesses who found it could fill their needs and was a lot less expensive than PC's at the time. Since the Lt. Kernal is designed to use the 'parallel-oriented expansion bus' instead of the serial bus that disk drives use, it's transfer rate is many times faster than 'normal' 15xx serial transfer rates. For example, in 128 mode a Lt. Kernal drive can run up to 65 kilobytes per second. Eventually, a family run company in Kansas, Xetec Inc., provided additional design and manufacturing of the Lt. Kernals and they became quite popular to hobbyists running Commodore BBS's. It was an expensive accessory, retailing -then- at over $1000, but then hobbies are supposed to cost money, aren't they? Here are some of the facinating features designed into the Lt. Kernal and its operating system: - Fourty-two additional or enhanced system commands - Automatic power-up execution of any application program - Up to 7 files can be open for reading or writing simultaneously in addition to the command/error channel - Built in backup & restore software using a speedy "Fastcopy" utility - User can set screen & character colors - CP/M software can be run on the Lt. Kernal system - DOS allows Key File indexing which is not available on disk drives - Can run copy protected software with limitations - Ability to use up to 15 C64's or C128's on one drive simultaneously using the multiplexer which I also build and support Xetec performed a great service to Commodore users by manufacturing several peripherals for Commodores: printer adapters and software, plus accessories for Atari's and Amigas and even the Macintosh. But eventually, the market for such accessories dwindled and Xetec decided to close it's doors in April of 1995. They had an auction in May of that year to sell off their inventory. Prior to the auction, Xetec contacted me since they knew I was in the habit of assisting Commodore users with my electronics expertise. I think Xetec genuinely cared for the future of the Lt. Kernal users, and since these precious unique parts would be forever lost to Commodore users by ending up at surplus electronics dealers, I was contacted. I emptied out my savings account to rescue these parts and even though it was tempting to set up a business of Lt. Kernal repair, I knew if Xetec wasn't making a profit at it, I wouldn't have much chance either. My work with Lt. Kernals is strictly a hobby. I charge folks just my costs and eventually will be pleased if I break even on my investment in parts. Besides, if I made a business out of my hobby, I might just suffer burnout and that could ruin my hobby. Word of mouth has provided me with all the work I can handle with the Lt. Kernal. But it is a great pleasure to provide continued support for these popular hard drives and I hope I'll have enough spare parts to continue to support them for a long time to come. Currently, the CMD hard drive system is the only commercially-available Commodore hard drive system and it is better suited for the regular Commodore hobbyist since it is more software compatible to your normal Commodore programs than the Lt. Kernal system. Commodore bbs's are the main use nowadays for the Lt. Kernal since most Commodore bbs software was written originally with a Lt. Kernal in mind. The Lt. Kernal Multiplexer allows, for example, the Commodore sysop to do true multi-tasking with his bbs without tying up the bbs for Sysop functions and even provides the capability of running a multi-line bbs on the Commodore. CommNet is the largest network of Commodore bbs's in the world with around 50 Commodore boards in the USA and Canada all networked and a good deal of those bbs's are running on Lt. Kernal hard drives. C-Net 128, DS-2 and New Image bbs networks are all linked via this network and other Commodore networks are encouraged to contact me to join this Commodore information highway. My bbs, the Batcave (303)/252-0735, has been operational for over 7 years and has around 700 active members with around 100 of those Commodore 8 bit users and guess what, it runs on a 105 meg Lt. Kernal! :) With Commodores getting cheaper every day at garage sales and support available for these great Commodore hard drive systems, there's no need to tie up a Pentium to run a bbs. -- To our knowledge, Mr. Ron Fick is the best and last source of Xetec hardware in 1996. If you have any problems with your Xetec peripherals or would like more information on Ron's stock of Xetec products, do not hesistate to email him at rfick@nyx.net \H05:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: >> The Metal Shop --- *+* --- with SMS Mike Eglestone << SysOp of Diamondback BBS (305)258-5039 Senior Master Sergeant Mike Eglestone has been a devout C= Hardware guru for over ten years and is the Sysop of one of the most active BBS's on the Commnet Commodore BBS network. Mr. Eglestone has written for illustrious magazines in the Commodore 8 bit community such as dieHard magazine and the very distinguished Commodore World. We are pleased to have him entertain our questions pertaining to hardware concerns. As always, the editors, the staff of disC=overy, and Mr. Eglestone are NOT responsible for the use or misuse of any information presented in this article. -- >> Dear SMS Mike, >> >> How do you run two or more SFD 1001 drives together with only one >> interface? I have a Quicksilver 128 hooked up to my SFD and was wondering >> how an additional SFD could be added to it? Could you tell me please? >> >> GF GF, Fairly simple, you daisy chain the drives with the appropriate cables. It works just exactly like the serial bus on the standard C= drives, but you do the hookup externally (cable to cable). My cables had MALE and FEMALE plugs on the same end. The cables hooked into each other at each plug point. Male into drive, Female side out. Next Male pluged into the back of that same connection, and so on down the line. If you don't have the cables with the double connectors, you can't make the parallel hookup. I don't know where you might find those cables anymore. They used to be quite common. I gave all my old ones away about six years ago. You might want to check with Bo Fain at Centsible Systems. He runs across a wide variety of things that are not currently available. (318) 687-4613 -- >> Dear SMS Mike, >> >> When I try to load up a program with my 1581, the power light starts to >> flicker and then refuses to load. What is going on here? >> >> RB RB, If the power light only flickers when the drive is turning a disk, it sounds more like a loose connection inside the drive. Just open up the case and check the drive power plug inside. It's fairly simple. There are NO dangerous voltages present inside that drive. None!! 5 Volts and 12 Volts... That's IT! The drive unit can be seperated from the mother board in a few minutes, but you don't even have to do that. Just check the drive plug. Run the drive with the top off and LOOK... It ain't no big deal and you can't hurt anything. Just pull the two screws (on the bottom) that hold the top on, Turn it over and lift the back of the top, take the top off... The front may fall off too, but it just sits there on a couple of pins... Don't be afraid to LOOK inside that drive. It's easy to put back together again.. Hell guy, I run two of them with NO tops at all.. Gotta smack one of them now and then (to get it turning); it's easy with the top off. The plugs to the drive are obvious. Pull them out and put them back a few times.. Might just be dirty connections. However, you may also have a dirty r/w head. As Mr. Ron Fick pointed out to me once, the power light can flicker after a file misread. The solution there would be to clean it lightly with drive-head cleaning solution available from drive cleaning kits at Radio Shack and most any computer store vendor. -- >> Dear SMS Mike, >> >> I have an odd 1581 problem. My 1581 does not always recognize disk swaps >> and sometimes falsely indicates that the write protect is set. There is a >> small microswitch that detects the write enable and presumable the disk >> swap as well. What does your SAMS guide say about this? It could also >> be the circuitry. What is the part number if the micro switch and is it >> generally available? >> >> RM RM, The write protect sensor is nothing more than a optical cell. It is either logic high or logic low depending upon the position of the write protect tab on the disk. No moving parts involved. I would venture a guess that you have one of the old Newtronics drives in that unit. If this is the case, the only way I have ever been able to recover from a failed reset is to re-initialize the drive then try to re-inseart the disk again. You should HEAR that dust shield slide back out of the way of the read write heads, folowed by a very short motor run. That is the indexing cycle for track 40. Unlike the other drives, the 1581 uses a fixed track index sensor to pre-position the stepper motor. It's a real tricky system to align properly. SAMS doesn't list the part numbers or the Manufacture Codes for any of the sensors on those old Newtronics Drives. There are three of them involved in the alignment process, and they have to be darn near perfect. Not much help here, guy... Those drives are no longer manufactured! Note : On one of my old drives, I just removed the write protect sensor and soldered the connections closed. It worked again, but you could not write protect a disk anymore. Sometimes you have to fudge a bit! -- >> Dear SMS Mike, >> I have this old Apple IIE that I would like to infuse with software. I don't >> have any telecommunications software or hardware for it though. I do have >> a C-64 with modem and 1541 drive. I hear the disk ][ Apple drives and the >> 1541 use a similar encoding scheme based on GCR. Is there a way to r/w apple >> disks on my C-64 & 1541, especially without hardware modification. >> >> OP OP, Yikes! Good question but as far as I know, I don't think there is an easy "software-only" answer here. I can think of a few options. I know that there was once an Apple II+ hardware emulator for the C-64. This 'Spartan' unit from Mimic systems allowed R/W to Apple disks, but I am not sure what role (if any!) a 1541 played in this arrangement. That being said, with so many C= software/hardware throughout the years, it may be conceivable that a disk ][ interface was available for the C-64. I do not know if such an interface exists, but the possibility might be worth investigating. As far as the actual drives are concerned, the following are known as problems to be overcome for a potential 1541 - disk ][ reader : - The 1541 rotates its disks at fixed speeds while its R/W head frequency can be changed in four steps (in series from 250 khz to 300 khz I believe). The disk ][ apparently has a variable speed drive engine which allows its R/W head to sit at one fixed frequency as it read/writes. As you can see, here we have two opposite paradigms regarding what remains fixed and what becomes variable to get the end-result of being able to read/write "GCR". Therefore, a 1541 could possibly read/write to a disk ][ format only in those areas on the disk where the paradigms cancel each other (i.e., where 1541 Static Rotation + Variable Freq. = disk ][ Variable Rotation + Static Freq.) The 1541 frequency resolution as mentioned earlier is in 4 steps, so it cannot match most of the changes incurred by the disk ]['s variable rotation. My guess is that a hardware modification to the 1541 would have to be done. - But that's not all, GCR does not equal GCR! The disk ][ and 1541 use a different GCR scheme! The 1541 uses a 4-5 encoding and the disk ][ uses an 8-9 encoding. On top of this, you then have to rewrite the whole file system on the C-64 end to match AppleDOS 3.xx whatever.. Not trivial. - As an aside, some Apple sources I checked with tend to suggest that the disk ][ runs at a constant 300 RPM. This is contrary to my admittedly limited experience with Apple hardware, but I was given a canonical source to reference this point : BENEATH APPLE DOS. It is supposed to be much like the classic tome : INSIDE COMMODORE DOS. If you or anyone else wishes to attempt a 1541 to disk ][ project, these are the books to get acquainted with. -- >> Dear SMS Mike, >> I hear the SuperCPU 128 will require a daughterboard or clip lead to the >> VDC chip. I don't want to open up my 128. What gives? >> >> PO PO, I have not heard this, but it would not surprise me. The VDC is poorly interfaced to main memory (for that matter, so is the Z80) in the C128. I can imagine a few reasons why additional hardware links above and beyond a simple cartridge plug-in might be required for Super-CPU & VDC operation. I won't speculate much on this forum, since I lack proper information about the SuperCPU paradigm and the VDC itself. Although, now that I think about it, I am reminded of the VDC article in disC=overy issue 1 (by S. Judd). I believe the goal of that article was to explore enough of the VDC internals to "time it out" so to speak. Now that we have gotten off-topic here :), I have never run into a way to make a stable raster on the VDC. Hmmmm, according to my sources, the VDC runs at the 16 Mhz dotclock while everything else on an NTSC C128 system runs at 14,318,181/14 Hz (on NTSC). I can't see a stable raster 100% under those conditions. Anyways, as per your original question, we will have to wait until CMD releases the SuperCPU 128 to find out -what- is required and -why-. -- >> Dear SMS Mike, >> >> I bought a VIC-20 at a thrift shop the other day, and OF COURSE, the >> thing came with no cabling or power supply. I managed to hack on a >> power supply and had no problems using standard C= serial cables for >> drive access, but how do I get a video/audio signal out of it? By >> the way, the VIC-20 will let me blindly type in and load a directory, >> so I'm pretty certain it works. >> >> FN FN, Here is the quickest way I know how to do it. Just remember that this is a VIC-20 Video Cable for use with TV/VCR/Monitors with VIDEO IN/AUDIO IN ports. Now looking at the back of your VIC-20, you will see the 5 DIN video port, as follows : /--\_/--\ / \ / 3 1 \ [ . . Ð [ 5 4 Ð \ . 2 . / \ . / \_______/ Pin 1 : +5-6 V, max. 10 mAmps (WARNING : DO NOT CONNECT THIS PIN!) Pin 2 : Ground Pin 3 : Audio Out Pin 4 : Video Low (Not Connected) Pin 5 : Video High You'll need a 5-pin DIN connector, two RCA jacks, and RCA cables. Take the 5-pin DIN connector (remember that the pins will be reversed when you view the connector as it faces you) and connect the pins, as follows : Pin 3 (Audio Out) to an RCA jack (label this one as audio out) Pin 5 (Video Out) to a second RCA jack (label this one as video out) Pin 2 (Ground) to the ground sleeve/prong of -both- RCA jacks. Using RCA-style cables, connect these Audio/Video-Out jacks to their respective Audio/Video-In counterparts on a VCR or Monitor/TV. You should now be able to watch your VIC-20 in action. If everything is connected properly, you will see the powerup message with a CYAN border and WHITE background (NTSC VIC-20). Your video difficulties should now be resolved. You also mentioned a problem in securing power supplies for the VIC-20. Although you resolved this issue, the traditional steps for those who might not be familiar with the VIC-20 is to swing your VIC to where the On/Off switch is located and find the power socket next to the switch. (It will be the socket closer to the big open port (for cartridges) at the back of your computer). If you look at your VIC-20's power socket and notice that there are more than 2 prongs :) on it, you are in luck. A regular C-64 power supply will work with your VIC-20. If you look at your VIC-20's power socket and it does have two prongs facing out, then you have to search! Find a power supply with at least 9 Volts AC delivered at 1 Ampere (with two prongs, each delivering power at 180 degrees out of phase from each other) and hook it up. If this is not an option, you can pull 9 Volts AC @ 1 Ampere from a C64 or flat C128 power supply. For example, the online 'zine C= Hacking, issue #6, has an article on building power supplies for the C-64. With two extra wires drawing off the 9 VAC and the proper two-prong nylon connector, the power supply described in the article becomes an excellent "old-style VIC-20" supply. :::::::::::d:i:s:C=:o:v:e:r:y:::::::::::::::::i:s:s:u:e::2:::::::::::::::::::: $2bad:::::::::::::::::::::::::::E:R:R:A:T:A::::::::::::::::::::::::::::::::::: :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: E R R A T A : I S S U E 1 >> /S04 - "A complete dissection of Gfx-Zone" >> $d000 by "XmikeX" - In TBB's music player code, "lda #$7f : sta $dc0d" was described as enabling timer interrupts when in reality it disables timer interrupts. - The author may be reached through the Editor-in-Chief of disC=overy. >> /S05 - "A Beginner's Guide to the JCH Editor V2.53, NewPlayer V14.G0" >> $d400 by Sean M. Pappalardo - SHIFT and SPACE inserts the sustain marker in the blocks (+++), * NOT * SHIFT and RETURN, as written in the article. - The author's internet address was omitted! Mr. Pappalardo is available for questions and comments at : pegasus@planet.earthcom.net >> /S07 - "Some preliminary data on VDC timing" >> $d600 by Stephen L. Judd - At least one of the uuencoded files included in the original article was found to be corrupt. Both have been verified and included below. Note: 'vdc-explorer' is the basic portion, which loads (from drive 8) the ML object file (vdc-explorer.o). begin 644 vdc-explorer M 1PP' H F2 BFY/6Q,,@Q5A03$]215(@0ED@TU1%4$A%3B#,+B#*541$(CK^ M"R Q $P<% "+(,(HT2@B,3,P,"(I*;(Q,C @IR T, !C'!X _A$B5D1#+458 M4$Q/4D52+D\B '$<* !.LC$R,#I#LC DQPR /XF.D:R,3J7(#4S,C8U+,(H M-3,R-C4I(*\@,C,Y *(E@!4-"A)*;+"*$%2*:HR-3:LPBA!4JHQ*3I!5B@T*;)!5B@T*:I4 M-"A)*0!['J 5#4H22FRPBA2,RFJ,C4VK,(H4C.J,2DZ058H-2FR058H-2FJ M5#4H22D J1ZJ %0V*$DILL(H4C0IJC(U-JS"*%(TJC$I.D%6*#8ILD%6*#8I MJE0V*$DI -<>M !4-RA)*;+"*$93*:HR-3:LPBA&4ZHQ*3I!5B@W*;)!5B@W M*:I4-RA)*0#P'KX 5#BR,C4VK,(H34$IJL(H34&J,2D 'A_( %0Y*$DILL(H M1D8IJC(U-JS"*$9&JC$I.D%6*#@ILD%6*#@IJE0Y*$DI %T?T@"9("(3$1$1 M$2)).U0Q*$DI.U0R*$DI.U0S*$DI.U0T*$DI.U0U*$DI.U0V*$DI.U0W*$DI M.U0Y*$DI &,?W "" )D?Y@!/2+)!5B@Q*:U..IDBDP5415-4,3H@3U9%4DA% M040](D]((B!%6%!%0U1%1#TB,ZU& +4?\ "9(AQ415-4,CH1G9V=G9V=HZ.C MHZ,B.P#,'_H 4U*R*$%6*#(IJT%6*#$I*:U. .L-:LQ*:U&.IDL(DU)3E53($Q/3U @3U9%4DA% M040](E13 !0A: &9+")$258@,S<@0DE4+4Q/3U!3/2)44ZLS-S"M1@!#(7(! MF2PB/3X@0DE4+4Q/3U @4D50151)5$E/3E,](BA44ZLS-S"M1BFL1JTW $TA M? &-(#8P, !I(88!F2(>5$535#4Z$9V=G9V=G:.CHZ.C(CL DB&0 9DL(E17 M3R!214%$4R!214<@,3@](BA!5B@U*:M!5B@Q*2FM3@"R(9H!F2PB15A014-4 M140@5D%,544](E-2K#*J.*U& +PAI &-(#8P, #8(:X!F2(?5$535#8Z$9V= MG9V=G:.CHZ.C(CL !R*X 4TQLBA!5B@V*:M!5B@Q*2FM3CJ9+")/3D4@345- M3U)9($9%5$-(/2)-,0 [(L(!15:R4U*L,ZHQ,JU&.IDL(D584$5#5$5$(%9! M3%5%/2)%5B(@1$E&1CTB33&K158 =B+, 9DL(E!23T(N($Y532!215!3(%1/ M(%=!250@1D]2(%9$0R!&151#2#TB*$TQJT56*:TH-ZU&*0" (M8!C2 V,# MG"+@ 9DBGE1%4U0W.A&=G9V=G9VCHZ.CHR([ ,LBZ@%54K(H058H-RFK058H M,2DIK4XZF2PB3$]/4"!-14U/4ED@1DE,3#TB55( _2+T 553LE52JS.M1JLR M-3:L*%-2JCFM1BDZF2PB15A44D$@5D1#(%=!2513/2)54P O(_X!F2PB059% M4D%'12!"250M3$]/4"!215!)5$E424].4SHB55.M*#(U-JPWK48I #DC" *- M(#8P, !5(Q("F2*!5$535#@Z$9V=G9V=G:.CHZ.C(CL A",< E92LBA!5B@X M*:M!5B@Q*2FM3CJ9+")43U1!3"!"3$]#2R!&24Q,/2)64@#$(R8"F2PB/3X@ M05!04D]8(%9$0R!424U%($9/4B R-38@0EE412!"3$]#2R!&24Q,/2)64JLR M-*U&JS.L4U( RB,P CH X",Z HT@-C P.HL@0[(Q(*<@-3DP /,C1 +^)3I# MLC$Z1K(R.HDX, ")$X"F2*?0EE%(2(Z@ 9)%@"H2!!)#J+($$DLB(B(*<@ ,-C P !\D8@*. end begin 644 vdc-explorer.o M !-XJ?^-!-V-!=VI&: (C0[=ZNKJZNJ,#MVI_SCM!-V-R12B$JD9C0[=C@#6 M+ #6$/N,#MTXJ?_M!-V-RA2I_^T%W8W+%*D9C0[=C@#6+ #6$/N. -8L -80 M^XP.W3BI_^T$W8W,%*G_[07=CJ?^. -8L -80^XT! MUJ(2C@#6+ #6$/N,#MVM =:-UA3HC@#6+ #6$/NM =:-UQ0XJ?_M!-V-V!2I :_^T%W8W9%%A@ #6 end >> /S09 - "Software analysis and reconstructive therapy, a historical view $dd00 on 'cracking'" by Pontus Berg - The author's internet address was omitted! Mr. Berg is available for questions and comments at : PBG@hk.mobitel.telia.se -- Note : None of these errors are present in the 'WordPerfect for Windows 5.2' version of disC=overy, issue 1. :::::::::::d:i:s:C=:o:v:e:r:y:::::::::::::::::i:s:s:u:e::2:::::::::::::::::::: \END::::::::::::::::::::::::::October 1, 1996::::::::::::::::::::::::::::::::: ::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::