From: Jim Brain (brain) @ 173.20.164.247 (Thu Dec 4 01:05:14 2008)
It works!
From: Jim Brain (brain) @ 173.20.164.247 (Thu Dec 4 01:18:58 2008)
Not much on top. SD connector, header, and 2 LEDs. The unit at bottom right is 3V3 voltage regulator. The unpopulated space is for a 5V voltage regulator, if someone wants to power from a 6V wall wart or something similar.
From: Jim Brain (brain) @ 173.20.164.247 (Fri Dec 26 15:44:34 2008)
From: James M @ 82.42.242.129 (Tue Sep 20 01:57:24 2005)
Can I get one ready assembled? ;)
From: wow @ 70.130.226.143 (Thu Dec 1 00:07:42 2005)
jim, there is money to be made in this uiec board of yours, i like this design already.. from what i heard it will support rel files and such am i right! hurry up guy,get this thing going and working so i can get one...thanks dslman2
From: wow @ 70.130.226.143 (Thu Dec 1 00:09:33 2005)
jim, there is money to be made in this uiec board of yours, i like this design already.. from what i heard it will support rel files and such am i right! hurry up guy,get this thing going and working so i can get one...thanks dslman2
From: Dopple @ 208.186.225.101 (Tue Jan 10 15:05:42 2006)
Dr()()l. Compatible with JiffyDOS? :) CMD HD style commands? Sorry, just dreaming/suggesting. :)
From: Show Off @ 81.151.12.9 (Mon Mar 13 15:33:54 2006)
Mostly the same as the last revision, but the RAM is changed, and I added 2 more lines to the IO header. I also flipped the location of the LEDs and the resistors.
Jim,
I cannot see any thing wrong there. I have a question though- what does the 4 leg IC do (2 pins to gnd & 2 to supply rail)?
From: Jim Brain @ 12.217.178.211 (Fri Jul 8 00:48:30 2005)
That's just the power and gnd lines for the RAM IC. Some package place them separately so you can put all the power and GND lines on a special spot on the schematic.
On previous examples, I used a stock CF connector included with the CAD application. FOr this final revision, I built the actual AVX connector I plan to use. Alas, it is longer.
From: Jim Brain (brain) @ 12.217.178.211 (Wed Jun 29 01:34:22 2005)
I had to flip the CF connector over to route, but determined a way to flip the rest of the connectors over, so all connectors are on the same side now.
From: Jim Brain (brain) @ 12.217.178.211 (Wed Jun 29 01:34:47 2005)
Almost done. I intend to expand IO connector to 20 pins to add 2 more IO lines, and then I am done.
From: Jim Brain (brain) @ 12.217.178.211 (Wed Jun 29 01:35:17 2005)
I had to move RAM and latch nuder CF to route, so I was able to add a IEC connector back into the design
From: Oldbitcollector @ 24.239.255.32 (Wed Jun 29 09:52:32 2005)
Yeah! The IEC connector made it back into the design! This board looks to be about 3"x3" What are the actual dimensions?
From: Jim Brain (brain) @ 162.123.17.82 (Wed Jun 29 11:11:34 2005)
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:29:34 2005)
Currently, the board is 2.25" square, though I am still working out how to place the RAM. I might change to a different package to get the routing to work out.
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:56:51 2005)
I may also bring out the few extra IO pins for the shift register to a larger version of SV2, in case folks want to use the IO for other uses besides burst mode
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:58:02 2005)
The CF routing will be a bit brute force, but it's not terribly difficult. If it works out better, I might flip the connector over.
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:50:48 2005)
The RAM and latch are not absolutely required, but the 4kB of internal CPU RAM will only support 4-5 open file buffers. More elaborate usage will require external RAM.
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:52:00 2005)
SV1 is a RapiDOS/SpeedDOS compliant parallel transfer connector. Later on, the firmware to support such a cable could be added. I think 500kBps - 1MBps transfers are possible.
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:53:01 2005)
The bulky DIN IEC connectors were discarded in favor of the header. If I have room over, I'll add the connector footprint back in.
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:54:38 2005)
I routed the SRQ line to the CPU shift register, to allow burst support to be added to the firmware. Currently, as with parallel transfers, firmware support is missing.
From: Raymond Day @ 69.137.213.125 (Wed Jun 22 08:27:21 2005)
I did not know you made this thinking of other things to add. Sounds good that you did that. But when do you think you will have all the info. put up so people can do it them selfs?
From: Raymond Day @ 69.137.213.125 (Wed Jun 22 08:31:25 2005)
I was thinking you all most had this done at the Expo how you showed it, it was working good. I guess it's like still in bata and you want to do more work before you put up the info. for others to do it. Thank you.
From: Jim Brain (brain) @ 162.123.17.80 (Wed Jun 22 11:25:16 2005)
Even as I brought the unit to EXPO, I knew it needed work. For instance, the current version can only have 1 file open, which prevent file to file copies, etc. So, yes, the unit was but just a alpha unit.
From: Raymond Day @ 68.42.134.150 (Thu Sep 22 10:11:38 2005)
If you would like the v1 code, simply email me at brain@jbrain.com with a request. Note, though, the v1 code is not beta, or even alpha. It's more like proof of concept.
For samborski: I deleted the optional stuff in the v2 schemtatic and re-uploaded. Does that elminate the "big and complicated" issue? Note that I still need to modify the code for the v2 boards.
From: Shaun Bebbington @ 195.93.21.71 (Wed Jun 1 04:31:19 2005)
I'm assuming that this will work with all serial-bus equipped Commodore machines?
From: Raymond Day @ 69.137.213.125 (Sun Jun 5 10:47:35 2005)
At the Expo I seen Jim put it on a SX-64 and get a DIR and load big files with JiffyDOS. He has the code for JiffyDOS bilt in this. He made that small code him self looking how JiffyDOS worked.
From: Jim Brain (brain) @ 162.123.17.80 (Tue Jun 21 17:27:45 2005)
It works on my 64 with JiffyDOS on or off. My SX64 works, but I have not tested my 128 or my +4.
